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Code No. Project Title Base Paper Abstract Video
VL01 A 0.3-V 37-nW 53-dB SNDR Asynchronous Delta–Sigma Modulator in 0.18-µm CMO (IEEE 2019) Download Download
VL02 A 12-bit, 2.5-bit/Phase Column-Parallel Cyclic ADC (IEEE 2019) Download Download
VL03 A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18-µm CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration(IEEE 2019) Download Download
VL04 A Dynamic Timing Error Avoidance Technique Using Prediction Logic in High-Performance Designs (IEEE 2019) Download Download
VL05 A Wideband Low-Noise Variable-Gain Amplifier with a 3.4 dB NF and up to 45 dB gain tuning range in 130 nm CMOS(IEEE 2019) Download Download
VL06 Area-Time Efficient Streaming Architecture for FAST and BRIEF Detector (IEEE 2019) Download Download
VL07 Analysis, Comparison, and Experimental Validation of a Class AB Voltage Follower With Enhanced Bandwidth and Slew Rate (IEEE 2019) Download Download
VL08 Column-Selection-Enabled 10T SRAM Utilizing Shared Diff-VDD Write and Dropped-VDD Read for Power Reduction (IEEE 2019) Download Download
VL09 Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors (IEEE 2019) Download Download
VL10 Fully Differential 4-V Output Range 14.5-ENOB Stepwise Ramp Stimulus Generator for On-Chip Static Linearity Test of ADCs(IEEE 2019) Download Download
VL11 Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS (IEEE 2019) Download Download
VL12 Multiloop Control for Fast Transient DC–DC Converter(IEEE 2019) Download Download
VL13 Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application (IEEE 2019) Download Download
VL14 A 0.9-V 12-Gb/s Two-FIR Tap Direct DFE With Feedback-Signal Common-Mode Control (IEEE 2019) Download Download
VL15 A 2.4-GHz Frequency-Drift-Compensated Phase-Locked Loop With 2.43 ppm/°C Temperature Coefficient (IEEE 2019) Download Download
VL16 A High-Flexible Low-Latency Memory-Based FFT Processor for 4G, WLAN, and Future 5G (IEEE 2019) Download Download
VL17 An Accurate and Noise-Resilient Spread-Spectrum Clock Tracking Aid for Digitally-Controlled Clock and Data Recovery Loops(IEEE 2019) Download Download
VL18 An Analog LO Harmonic Suppression Technique for SDR Receivers (IEEE 2019) Download Download
VL19 An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With 0.175 µW/Channel in 65-nm CMOS (IEEE 2019) Download Download
VL20 Analysis and Optimization of Multisection Capacitive DACs for Mixed-Signal Processing (IEEE 2019) Download Download
VL21 CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency(IEEE 2019) Download Download
VL22 Design of Reconfigurable Digital IF Filter with Low Complexity (IEEE 2019) Download Download
VL23 Feedforward-Cutset-Free Pipelined Multiply–Accumulate Unit for the Machine Learning Accelerator(IEEE 2019) Download Download
VL24 Line Coding Techniques for Channel Equalization: Integrated Pulse-Width Modulation and Consecutive Digit Chopping (IEEE 2019) Download Download
VL25 Multiplier-free Implementation of Galois Field Fourier Transform on a FPGA (IEEE 2019) Download Download
VL26 Power-Efficient Gm-C DSMs With High Immunity to Aliasing, Clock Jitter, and ISI (IEEE 2019) Download Download
VL27 A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths (IEEE 2019) Download Download
VL28 A Decoder for Short BCH Codes With High Decoding Efficiency and Low Power for Emerging Memories (IEEE 2019) Download Download
VL29 A High-Throughput Hardware Accelerator for Lossless Compression of a DDR4 Command Trace(IEEE 2019) Download Download
VL30 An Energy-efficient Accelerator based on Hybrid CPU-FPGA Devices for Password Recovery(IEEE 2019) Download Download
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